Major and Classification
Murali Annavaram, Ph.D.
Viterbi: Electrical Engineering
“Warp Splitting and Lane Shifting: improving energy efficiency of GPUs through thread remapping.”
Graphics Processing Units (GPUs) have become a major focal point in computer architecture research over the years. Already an essential component in computing hardware, GPUs are constantly finding more uses and are even opening doors to newer computing applications that were not possible before. Within GPUs, energy leakage from inefficient use of hardware units accounts for almost 50% of the total power usage, which is exceedingly wasteful. Furthermore, in an era of such massive reliance on mobile computing devices which rely on limited portable energy sources, any improvement in GPUs’ energy consumption has monumental impact overall. To address this issue of energy efficiency, we make use of power gating, a power-saving technique already used in modern GPUs that takes advantage of periods of extended inactivity and powers off hardware temporarily. We propose two techniques that can be used in a conjunction to increase power gating opportunities, and thus energy efficiency. Warp Splitting divides hardware instructions into two half-instructions and leaves the second half of the instructions empty. The empty portions are aligned such that they create inactive periods within hardware that can be power gated. Lane Shifting systematically sorts individual pieces within single instructions according to hardware activity, such that across multiple sorted instructions, active and inactive hardware units are lined up with each other. This creates regions of inactivity in the hardware, which in turn creates power gating opportunities. We show that by using the two proposed techniques we can increase power gating potential by 5.45% across GPUs’ computing units. The proposed solutions suffer little to no performance impact.